Tseng, Hsi-Che and Ye, Zhi-Hong and Chi, Hsin-Chou (2015) Design of a multicast router for network-on-chip architectures with irregular topologies. In: 5th International Conference on Computing and Informatics (ICOCI) 2015, 11-13 August 2015, Istanbul, Turkey.
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Abstract
As chip complexity keeps increasing in system-on-chip (SoC), the on-chip interconnect has become a critical issue for large-scale chip design.It has been proposed that the packet-switched network exchanging messages between intellectual property (IP) cores is a viable solution for the SoC interconnect problem.The design of the router in such network-on-chip (NoC) architectures is the key to high-performance communication for the IP cores in SoC. In this paper, we present the design and implementation of a multicast router for NoC with irregular topologies.The router employs our previously proposed tree-based routing algorithm for irregular networks.Our experiment results show that the multicast router has a slightly lower clock rate and moderately larger chip area than the unicast router in NoC.Since multicasting is a technique providing superior network performance, especially for large networks, such multicast router design is an effective routing solution for large-scale network-on-chip architectures.
Item Type: | Conference or Workshop Item (Paper) |
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Additional Information: | ISBN No: 978-967-0910-02-4 Jointly organized by: Universiti Utara Malaysia & Istanbul Zaim University |
Uncontrolled Keywords: | network-on-chip, router, system-on-chip, VLSI design |
Subjects: | Q Science > QA Mathematics > QA75 Electronic computers. Computer science |
Divisions: | School of Computing |
Depositing User: | Mrs. Norazmilah Yaakub |
Date Deposited: | 01 Oct 2015 08:08 |
Last Modified: | 28 Apr 2016 01:15 |
URI: | https://repo.uum.edu.my/id/eprint/15624 |
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